104年第1學期-1168 進階邏輯設計 課程資訊

評分方式

評分項目 配分比例 說明
Homework 30
Midterm exam 35
Final exam 35

選課分析

本課程名額為 70人,已有17 人選讀,尚餘名額53人。


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授課教師

廖啟賢

教育目標

1. Understanding Verilog HDL. 2. Able to analyze and design complex digital systems.

課程概述

This course is an extension of Digital Systems. Both the traditional and the modern methods of applying digital design and development techniques will be introduced.

課程資訊

參考書目

1. Digital Design An Embedded Systems Approach Using Verilog, Peter Ashenden, 2008 (Morgan Kaufmann)
2. Digital Systems Principles and Applications 10th ed., Tocci, 2007 (Pearson)
3. Fundamentals of Digital Logic with Verilog Design, 2nd ed., S. Brown and Z. Vranesic, 2008 (Mc Graw Hill)

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