106年第1學期-1144 硬體描述語言設計與模擬 課程資訊

課程分享

選課分析

本課程名額為 70人,已有42人選讀,尚餘名額28人。

評分方式

評分項目 配分比例 說明
Homework 30
Midterm exams 30
Final exam 25
Attendance and participation 15

授課教師

廖啟賢

教育目標

1. Understanding advanced Verilog HDL. 2. Use Verilog HDL to design and simulate digital systems.

課程概述

This course is an extension of Digital Systems. A logical progression of Verilog HDL-based topics will be introduced.

課程資訊

參考書目

1. Verilog HDL, 2nd ed, Samir Palnitkar, SunSoft Press, 2003.
2. Digital Design, 5th ed. by M. Mano Prentice-Hall.
3. Advanced Digital Design with the Verilog HDL, 2nd ed, Michael D. Ciletti, Peasrson, 2010.