硬體描述語言設計與模擬

106學年第1學期 必修課
授課大綱
70
名額
42
已選
28
餘額
上課時間
三/1,2,四/2[C202]
授課教師
Office Hour:Tue.: 8:10-9:00 Wed.: 8:10-9:00 Thu.: 9:10-10:00 Fri.: 9:10-10:00 at ST417.
修課班級
資工系資電組2 · 年級以上
課程資訊
選課分析
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Homework
30
Midterm exams
30
Final exam
25
Attendance and participation
15

This course is an extension of Digital Systems. A logical progression of Verilog HDL-based topics will be introduced.

1. Understanding advanced Verilog HDL. 2. Use Verilog HDL to design and simulate digital systems.

1. Verilog HDL, 2nd ed, Samir Palnitkar, SunSoft Press, 2003.
2. Digital Design, 5th ed. by M. Mano Prentice-Hall.
3. Advanced Digital Design with the Verilog HDL, 2nd ed, Michael D. Ciletti, Peasrson, 2010.

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