This course aims to provide students with a comprehensive understanding of the evolution and significance of advanced IC packaging technologies, which have been pivotal in extending Moore’s Law beyond traditional scaling limits and driving system-level performance enhancements in modern electronics. Participants will acquire in-depth knowledge of cutting-edge packaging methods, such as fan-in/fan-out wafer-level packaging (WLP), 2.5D and 3D integration techniques, hybrid bonding processes, and chiplet-based heterogeneous integration architectures that enable modular and efficient system designs. The curriculum will delve into analyzing key technical challenges, including thermal management strategies to mitigate heat dissipation, optimization of electrical performance for high-speed signaling, ensuring long-term reliability under stress conditions, and improving manufacturability for scalable production. Students will evaluate emerging industry trends, such as the development of chiplet ecosystems, high-bandwidth memory (HBM) integration, and panel-level packaging solutions, exploring their practical applications in artificial intelligence (AI), high-performance computing (HPC), and consumer electronics sectors. Ultimately, the course fosters critical thinking skills to assess future innovations in packaging and holistic system integration strategies, preparing students to contribute to the semiconductor industry's ongoing advancements.

參考會議與期刊：
o IEEE International Electron Devices Meeting (IEDM)
o IEEE Electronic Components and Technology Conference (ECTC)
o International Microelectronics Assembly and Packaging Society (IMAPS)
o IEEE Transactions on Components, Packaging and Manufacturing Technology (TCPMT)
• 技術路線圖：International Roadmap for Devices and Systems (IRDS)
• 產業趨勢追蹤：
• SemiWiki (https://semiwiki.com)
• Semiconductor Engineering (https://semiengineering.com)